Maximize energy saving of multimedia mobile phone processor based on AVS technology

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With the expansion of high-data-rate infrastructure around the world and the increasing popularity of multimedia devices, multi-function phones are almost always in use like voice-based phones, but rely on battery capacity. Imagine all the functional operations that the current user can perform on their respective devices, such as downloading/sharing/listening to music, downloading/sharing photos, playing games, and watching movies and restaurants through the Internet, etc., which are gradually becoming a kind of The all-weather lifestyle requires equipment with longer uptime to support.

The user experience is very important for end users, and network operators and content providers also rely on these new multimedia features and their extended services to generate revenue, so limited battery life means limited revenue.
The current power conversion efficiency has exceeded 90%, and the further improvement in efficiency will have little impact on the whole. Therefore, it is necessary to adopt new technologies for system-level energy management. If the processor can adjust the frequency according to actual needs, and combined with the power management technology that can reduce the voltage according to the frequency, the energy consumption can be significantly reduced, and the running time is extended accordingly.
Voltage regulation
The concept of voltage regulation and energy savings can be expressed by the energy consumption formula of the digital system:
E={(CVDD2f)+(VDDILEAK)}t
The dynamic terms here include C (circuit capacitance), VDD (supply voltage), and f (clock frequency); the static term is determined by the ILEAK (leakage current) of the digital gate. From this equation, it can be seen that the use of common energy-saving techniques in digital circuits can ultimately reduce energy consumption by reducing the frequency (f) and voltage (VDD) of the processing engine. Dynamic voltage regulation (DVS) and adaptive voltage regulation (AVS) are two common voltage regulation techniques. Figure 1 shows the power savings of the DVS and implementation.
What is DVS and AVS?
DVS is an open-loop scheme that adjusts voltage and frequency by pre-feature reduction or by using a voltage-frequency lookup table. These voltages must be high enough to maintain functionality across all devices and temperature ranges. Although this open-loop solution can save considerable energy, it does not achieve all possible energy savings.
AVS is a closed-loop solution that keeps the power supply voltage as low as possible while still completing tasks. DVS adjusts the supply voltage to a fixed pre-feature value, ignoring process, temperature, and power supply variations. AVS takes all of these factors into account when determining the optimum supply voltage to ensure that energy consumption is minimized.
Figure 1: Comparison of fixed voltage operating modes, energy savings achieved by DVS and AVS techniques
How AVS works
AVS is a system-level solution that automatically and independently controls the supply voltage of each processing engine in the SoC, reducing the power consumption of digital SoC solutions. AVS embeds an integrated core that is compatible with Advanced Microcontroller Bus Architecture (AMBA) and Advanced Power Controller (APC) in the SoC, as shown in Figure 2.
APC enables the system to implement dynamic voltage regulation or full adaptive voltage regulation on the target SoC. By interacting with the power supply system, APC reduces power supply requirements while maintaining peak efficiency to ensure that the supply voltage at the current SoC clock frequency is minimized, thereby minimizing digital logic energy consumption.
APC uses three interfaces to connect the rest of the system: an AMBA-compatible host interface, a clock management unit (CMU) interface, and an open standard PowerWise interface (PWI). The host interface is used to control and configure APC2, while the CMU interface is used to coordinate voltage and frequency changes.
The PWI is a simple and fast (up to 15MHz) two-pin serial interface designed to meet AVS and DVS requirements with a wide range of programming options for versatile applications. The latest PWI 2.0 standard supports multiple SoCs and peripherals on the same bus. The PWI interface is used to communicate power management information with an external energy management unit (EMU) or to control other peripherals.
Figure 2: AVS implementation
Summary of this article
With the emergence of more and more media content and high-speed data rates, how to perform high-speed processing in multimedia phones while saving energy to extend battery life is becoming a challenge. Advanced power management technologies such as AVS can significantly reduce the power consumption of digital processing, thereby extending equipment uptime and enhancing the user experience. These advanced energy-saving technologies eliminate the need to charge the battery every few hours, extending the phone's talk time, game time or video time. Therefore, these technological advances allow us to enjoy more mobile services.

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