In 2013, Cypress introduced the PSoC4, the latest product in the Programmable System on Chip family of Programmable System-on-Chip (PSoC), which uses the ARM Cortex-M0 as the processing core. PSoC4 fully inherits the highly programmable flexibility of the PSoC chip family itself, and combines the Cortex-M0 cost-effective processor core architecture, making the PSoC4 series a highly scalable processor platform, cost-effective, The advantages in terms of consumption and so on are significant. It is worth mentioning that PSoC4 provides complete and unique on-chip resources for motor control, so engineers will be more intuitive and fast when developing motor control systems on PSoC4.
The PSoC4 product line is currently available in two entry-level product families, the CY8C4100 and CY8C4200. This article takes CY8C4200 as an example to introduce how to develop a three-phase brushless DC motor control system with sensors on PSoC4.
2. Introduction to PSoC4 architecture and on-chip resources related to motor controlPSoC 4 is a family of programmable embedded system controllers based on the ARM Cortex-M0 CPU (processor), providing a powerful programmable platform for embedded applications. It combines programmable analog resources, programmable interconnects, user-programmable digital logic, a common fixed-function design, and a high-performance ARM Cortex-M0 CPU subsystem.
Figure 1 is a system block diagram of PSoC4. Due to space limitations, this article will mainly summarize the on-chip resource characteristics related to brushless DC motor control. For details, refer to the PSoC4 data sheet on the Cypress website.
â— Up to 48MHz, 43 DMIPS 32-bit Cortex-M0 CPU with single-cycle multiplication
â— Up to 32 KB Flash and 4 KB SRAM memory
â— Four independent TCPWMs that support center alignment, supporting complementary programmable deadband and synchronous ADC operation
â— Two operational amplifiers that support comparator mode and SAR ADC input buffering
• Two current digital-to-analog converters (IDACs) that can be output to internal modules or output to the outside through GPIO outputs as customizable user current sources.
â— Four programmable digital logic modules (UDB)
â— A 12-bit 1 Msps ADC supporting zero overhead channel switching
â—CapSense driver
Figure 1: PSoC4 chip system block diagram
PSoC4 is consistent with the previous generation of the PSoC family in the development environment. It is still PSoC Creator, continuing the development method of abstracting on-chip resources into modular components. The control system architecture is clear and specific, simple and fast. Users can pay more attention to the functional development of the product, and pay less attention to the hardware structure details of the chip.
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