High precision FSK generation circuit diagram

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As shown in the figure, it is an FSK generation circuit composed of a dual 4-bit serial-in-out shift register CD4015, a six-inverter CD4069 (D1 to D4), and a pre-settable 4-bit binary up/down counter CD40193. The FSK signal generated by the circuit has the characteristics of high precision and continuous phase.

FSK generating circuit

FSK is the frequency shift keying signal. In this circuit diagram, K is the keying terminal, which can control the frequency division coefficient of CD40193. By connecting two CD40193s in series, an 8-bit counter can be obtained. We can set the preset number for the counter through the 8-position number terminal.
When K is in a high state, the 8-bit binary preset number is 00111010, and thus the division factor is 58. The crystal oscillator composed of D2 generates an oscillation pulse applied to the CPd terminal of the CD40193, and the CD40193 divides the signal by 58.
When K is in a low state, the 8-bit binary preset number is 01000101, and thus the division factor is 69. An oscillating pulse generated by the crystal oscillator is applied to the CPd terminal of the CD40193, and the CD40193 divides the signal by 69.
The output of the CD4015 passes through the resistor network to produce a stepped pseudo sine wave of 16 division.