#ifndef AT89CX051_HEADER_FILE
#define AT89CX051_HEADER_FILE 1
Sfr SP = 0 x81;
Sfr DPL = 0 x82;
Sfr DPH = 0 x83;
Sfr PCON = 0 x87;
Sfr TCON = 0 x88;
Sfr TMOD = 0 x89;
Sfr TL0 = 0 x8A;
Sfr TL1 = 0 x8B;
Sfr TH0 = 0 x8C;
Sfr TH1 = 0 x8D;
Sfr P1 = 0 x90;
Sfr SCON = 0 x98;
Sfr SBUF = 0 x99;
Sfr IE = 0 xA8;
Sfr P3 = 0 xB0;
Sfr IP = 0 xB8;
Sfr PSW = 0 xD0;
Sfr ACC = 0 xE0;
Sfr B = 0 xF0;
#define IDL_ 0 x01
#define STOP_ 0 x02
#define EWT_ 0 x04
#define EPFW_ 0 x08
#define WTR_ 0 x10
#define PFW_ 0 x20
#define POR_ 0 x40
#define SMOD_ 0 x80
Sbit IT0 = 0 x88;
Sbit IE0 = 0 x89;
Sbit IT1 = 0 x8A;
Sbit IE1 = 0 x8B;
Sbit TR0 = 0 x8C;
Sbit TF0 = 0 x8D;
Sbit TR1 = 0 x8E;
Sbit TF1 = 0 x8F;
#define T0_M0_ 0 x01
#define T0_M1_ 0 x02
#define T0_CT_ 0 x04
#define T0_GATE_ 0 x08
#define T1_M0_ 0 x10
#define T1_M1_ 0 x20
#define T1_CT_ 0 x40
#define T1_GATE_ 0 x80
#define T1_MASK_ 0 xF0
#define T0_MASK_ 0 x0F
Sbit P1_0 = 0 x90;
Sbit P1_1 = 0 x91;
Sbit P1_2 = 0 x92;
Sbit P1_3 = 0 x93;
Sbit P1_4 = 0 x94;
Sbit P1_5 = 0 x95;
Sbit P1_6 = 0 x96;
Sbit P1_7 = 0 x97;
Sbit AIN0 = 0 x90;
Sbit AIN1 = 0 x91;
Sbit RI = 0 x98;
Sbit TI = 0 x99;
Sbit RB8 = 0 x9A;
Sbit TB8 = 0 x9B;
Sbit REN = 0 x9C;
Sbit SM2 = 0 x9D;
Sbit SM1 = 0 x9E;
Sbit SM0 = 0 x9F;
Sbit EX0 = 0 xA8;
Sbit ET0 = 0 xA9;
Sbit EX1 = 0 xAA;
Sbit ET1 = 0 xAB;
Sbit ES = 0 xAC;
Sbit ET2 = 0 xAD;
Sbit EA = 0 xAF;
Sbit P3_0 = 0 xB0;
Sbit P3_1 = 0 xB1;
Sbit P3_2 = 0 xB2;
Sbit P3_3 = 0 xB3;
Sbit P3_4 = 0 xB4;
Sbit P3_5 = 0 xB5;
Sbit P3_7 = 0 xB7;
Sbit RXD = 0 xB0;
Sbit TXD = 0 xB1;
Sbit INT0 = 0 xB2;
Sbit INT1 = 0 xB3;
Sbit T0 = 0 xB4;
Sbit T1 = 0 xB5;
Sbit AOUT = 0 xB6;
Sbit PX0 = 0 xB8;
Sbit PT0 = 0 xB9;
Sbit PX1 = 0 xBA;
Sbit PT1 = 0 xBB;
Sbit PS = 0 xBC;
Sbit P = 0 xD0;
Sbit FL = 0 xD1;
Sbit OV = 0 xD2;
Sbit RS0 = 0 xD3;
Sbit RS1 = 0 xD4;
Sbit F0 = 0 xD5;
Sbit AC = 0 xD6;
Sbit CY = 0 xD7;
#define IE0_VECTOR 0
#define TF0_VECTOR 1
#define IE1_VECTOR 2
#define TF1_VECTOR 3
#define SIO_VECTOR 4
#endif
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