Integrated low-power design technology throughout the IC implementation process - News - Global IC Trade Starts Here Free

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Reducing power consumption is one of the most challenging requirements of modern chip design. When using a single-point tool flow, it is often only in the later stages of the design process that the need to reduce power consumption is often considered, often resulting in a large number of problems and delays. Rob Knoth, Senior Technical Product Manager at Magma Design Automation, explained to us why power optimization should be an integral component of a complete design process.

Initially, low-power design techniques were primarily used for mobile products. Nowadays, there are so many products plugged into the power sockets, they are constantly absorbing current, and a lot of power is wasted on these products all over the world. Today, the government is actively asking electronics companies to comply with stricter requirements to help reduce global power consumption. Low-power design is closely related to everyone. Low-power requirements are now ubiquitous and more challenging.

Low-power designs, whether dynamic or static, require complex trade-offs between timing, power, and area at all stages of the design flow. These requirements are closely related to each other. To address these requirements, the low-power analysis and optimization engine must be integrated and applied throughout the entire process from RTL specifications to GDSII outputs. Since the chip size continues to grow, this process must be scalable, otherwise it will limit the designer's productivity.

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