The classic rules of high-speed pcb signal routing make pcb design no longer difficult

Rule 1: High-speed signal trace shielding rules In high-speed PCB design, critical high-speed signal lines such as clocks, traces need to be shielded. If there is no shielding or only shielding parts, it will cause EMI leakage. It is recommended to shield the wire, every 1000 mil, punch the ground.

Rule 2: Closed-loop rules for high-speed signals

Due to the increasing density of PCB boards, many PCB LAYOUT engineers are prone to a mistake in the process of routing, that is, high-speed signal networks such as clock signals, resulting in closed-loop results in multi-layer PCB traces. Such a closed loop result will produce a loop antenna that increases the radiant intensity of EMI.

Rule 3: Route-opening rules for high-speed signals

Rule 2 mentions that the closed loop of a high speed signal will cause EMI radiation, however open loop will also cause EMI radiation.

A high-speed signal network, such as a clock signal, produces a linear antenna that increases the radiant intensity of EMI once it has an open loop result in a multi-layer PCB trace.

Rule 4: Characteristic impedance of high-speed signals Continuously regular high-speed signals must ensure continuity of characteristic impedance when switching between layers. Otherwise, EMI radiation will increase. That is to say, the width of the wiring of the same layer must be continuous, and the trace impedance of different layers must be continuous.

Rule 5: Wiring direction of high-speed PCB design The routing between adjacent two layers must follow the principle of vertical routing, otherwise it will cause crosstalk between lines and increase EMI radiation. In short, the adjacent wiring layers follow the horizontal and vertical wiring directions, and the vertical wiring can suppress crosstalk between lines.

Rule 6: Topology Rules in High-Speed ​​PCB Design In high-speed PCB design, the control of the characteristic impedance of the board and the topology design under multi-load conditions directly determine the success or failure of the product. The illustration shows a daisy chain topology, which is generally used for several Mhz cases. A star-shaped symmetrical structure at the back end is recommended for high-speed PCB design.

Rule 7: The resonance rule of the trace length checks whether the length of the signal line and the frequency of the signal constitute resonance, that is, when the wiring length is an integral multiple of the signal wavelength 1/4, the wiring will generate resonance, and the resonance will radiate. Electromagnetic waves, causing interference.

Rule 8: Reflow Path Rules All high speed signals must have a good return path. As much as possible, ensure that the return path of high-speed signals such as clocks is minimized. Otherwise, the radiation is greatly increased, and the magnitude of the radiation is proportional to the area surrounded by the signal path and the return path.

Rule 9: Decoupling Capacitor Placement of the Device The position of the decoupling capacitor is very important. Unreasonable placement does not result in decoupling. The principle is: close to the pin of the power supply, and the area enclosed by the power supply trace and ground of the capacitor is the smallest.